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Browsing SEUSL International Symposium by Subject "Karnaugh-map"

Browsing SEUSL International Symposium by Subject "Karnaugh-map"

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  • Khedika, S; Rathnathevi, R; Sagirtha(, S; Mathialakan, T; Kanaganathan, S (South Eastern University of Sri lanka, 2013-07-06)
    An endeavor has made to develop an application software tool called “Logic Circuit Diagram Designer”. Logic Circuit Diagram Designer is a learning tool for Logical Circuit Designing and simplifying Boolean expression. ...

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