Please use this identifier to cite or link to this item: http://ir.lib.seu.ac.lk/handle/123456789/378
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dc.contributor.authorKhedika, S
dc.contributor.authorRathnathevi, R
dc.contributor.authorSagirtha(, S
dc.contributor.authorMathialakan, T
dc.contributor.authorKanaganathan, S
dc.date.accessioned2015-09-04T03:18:31Z
dc.date.available2015-09-04T03:18:31Z
dc.date.issued2013-07-06
dc.identifier.citationProceedings of the Third International Symposium 2013, pp. 31-35
dc.identifier.issn9789556270426
dc.identifier.urihttp://ir.lib.seu.ac.lk/handle/123456789/378
dc.description.abstractAn endeavor has made to develop an application software tool called “Logic Circuit Diagram Designer”. Logic Circuit Diagram Designer is a learning tool for Logical Circuit Designing and simplifying Boolean expression. This paper explains algorithm and methodology for transforming Boolean Expression into Logic Circuit diagram and transforming Logic circuit diagram into Boolean Expression. The Karnaugh-map technique is used to simplify the Boolean Expression. The versatile software Logic Circuit Diagram Designer has developed using C# language in Microsoft Visual Studio.Net 2008en_US
dc.language.isoen_USen_US
dc.publisherSouth Eastern University of Sri lankaen_US
dc.subjectLogical circuiten_US
dc.subjectBoolean expressionen_US
dc.subjectKarnaugh-mapen_US
dc.titleLearning tool for converting boolean expression and logic circuit diagramen_US
dc.typeFull paperen_US
Appears in Collections:3rd International Symposium - 2013

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